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Entries in Barefoot (2)

Thursday
Apr302020

Ranovus outlines its co-packaged optics plans 

Part 2: Odin technology

Ranovus has tested a chiplet that combines electronics and silicon photonics. Dubbed Odin 8, the monolithic design is targetting the co-packaged optics opportunity, enabling silicon chips to communicate optically.

The company is developing two such chiplets: the 800-gigabit Odin 8 and the higher-capacity Odin 32 that supports 3.2 terabits of traffic. 

Hamid Arabzadeh 

The first use of Odin 8 will be for 800-gigabit client-side modules. We already have three lead customers for our 800-gigabit module business,” says Hamid Arabzadeh, CEO of Ranovus.

The 800-gigabit pluggable modules using the Odin 8 are expected to be generally available from late 2021.

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Thursday
Mar192020

Intel combines optics to its Tofino 2 switch chip

Part 1: Co-packaged Ethernet switch 

The advent of co-packaged optics has moved a step closer with Intels demonstration of a 12.8-terabit Ethernet switch chip with optical input-output (I/O).  


Source: Intel.

The design couples a Barefoot Tofino 2 switch chip to up to 16 optical tiles’ - each tile, a 1.6-terabit silicon photonics die - for a total I/O of 25.6 terabits.

Its an easy upgrade to add our next-generation 25.6-terabit [switch chip] which is coming shortly,” says Ed Doe, Intels vice president, connectivity group, general manager, Barefoot division. 

Intel acquired switch-chip maker, Barefoot, seven months ago after which it started the co-packaging optics project.

Intel also revealed that it is in the process of qualifying four new optical transceivers - a 400Gbase-DR4, a 200-gigabit FR4, a 100-gigabit FR1 and a 100Gbase-LR4 - to add to its portfolio of 100-gigabit PSM4 and CWDM4 modules.

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