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Tuesday
Sep182018

Switch chips not optics set the pace in the data centre  

Broadcom is doubling the capacity of its switch silicon every 18-24 months, a considerable achievement given that Moore’s law has slowed down. 

Last December, Broadcom announced it was sampling its Tomahawk 3 - the industry’s first 12.8-terabit switch chip - just 14 months after it announced its 6.4-terabit Tomahawk 2.

Rochan SankarSuch product cycle times are proving beyond the optical module makers; if producing next-generation switch silicon is taking up to two years, optics is taking three, says Broadcom. 

“Right now, the problem with optics is that they are the laggards,” says Rochan Sankar, senior director of product marketing at switch IC maker, Broadcom. “The switching side is waiting for the optics to be deployable.”

The consequence, says Broadcom, is that in the three years spanning a particular optical module generation, customers have deployed two generations of switches. For example, the 3.2-terabit Tomahawk based switches and the higher-capacity Tomahawk 2 ones both use QSFP28 and SFP28 modules. 

In future, a closer alignment in the development cycles of the chip and the optics will be required, argues Broadcom.

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Thursday
Aug232018

Is ADVA Optical Networking looking to buy ECI Telecom?

Is ADVA Optical Networking preparing a bid for private company ECI Telecom? The latest consolidation rumour involving the two mid-tier metro players comes after Infinera’s announcement that it is acquiring Coriant, a deal that is expected to close this quarter. 

According to a source in the financial sector, ADVA wanted to acquire Coriant but failed to raise the required funds. Infinera’s successful bid for Coriant has led ADVA to consider alternatives as it looks to secure its future in a consolidating marketplace, with ECI Telecom being viewed as an attractive target. 

ECI Telecom is reportedly considering an initial public offering (IPO) on the London Stock Exchange to raise $170 million. A source close to ADVA confirmed that ‘ECI is looking for a home’ but declined to comment on whether ADVA is involved. Another source close to ADVA suggested that there may be some truth in such a bid.

ADVA declined to comment. 

An ECI spokesperson said the company has issued no statement regarding an IPO and expressed surprise when asked if ECI was looking to merge. The spokesperson declined to comment when asked about ADVA acquiring ECI. 

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Monday
Aug202018

T-API taps into the transport layer 

The Optical Internetworking Forum (OIF) in collaboration with the Open Networking Foundation (ONF) and the Metro Ethernet Forum (MEF) have tested the second-generation transport application programming interface (T-API 2.0).

SK Telecom's Park Jin-hyo

T-API 2.0 is a standardised interface, released in late 2017 by the ONF, that enables the dynamic allocation of transport resources using software-defined networking (SDN) technology.

The interface has been created so that when a service provider, or one of its customers, requests a service, the required resources including the underlying transport are configured promptly.       

The OIF-led interoperability demonstration tested T-API 2.0 in dynamic use cases involving equipment from several systems vendors. Four service providers - CenturyLink, Telefonica, China Telecom and SK Telecom - provided their networking labs, located in three continents, for the testing.

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Wednesday
Aug082018

ADVA adds quantum-resistant security to its optical systems  

ADVA has demonstrated two encryption techniques for optical data transmission to counter the threat posed by quantum computing.  

“Quantum computers are very powerful tools to solve specific classes of mathematical problems,” says Jörg-Peter Elbers, senior vice president, advanced technology at ADVA. “One of these classes of problems is solving equations behind certain cryptographic schemes.”  

 

The use of three key exchange schemes over one infrastructure: classical public-key encryption using the Diffie-Hellman scheme, the quantum-resistant Neiderreiter algorithm, and a quantum-key distribution (QKD) scheme. Source: ADVA

Public-key encryption makes use of discrete logarithms, an example of a one-way function. Such functions use mathematical operations that for a conventional computer are easy to calculate in one direction but are too challenging to invert. Solving such complex mathematical problems, however, is exactly what quantum computers excel at. 

A fully-fledged quantum computer does not yet exist but the rapid progress being made in the basic technologies suggests it is only a matter of time. Once such computers exist, public key based security will be undermined. 

The looming advent of quantum computers already threatens data that must remain secure for years to come. There are agencies that specialise in tapping fibre, says Elbers, while the cost of storage is such that storing huge amounts of data traffic in a data centre is affordable. “The threat scenario is certainly a real one,” says Elbers. 

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Monday
Jul302018

Infinera buying Coriant will bring welcome consolidation  

Infinera is to purchase privately-held Coriant for $430 million. The deal will effectively double Infinera’s revenues, add 100 new customers and expand the systems vendor’s product portfolio.

Infinera's CEO, Tom FallonBut industry analysts, while welcoming the consolidation among optical systems suppliers, highlight the challenges Infinera faces making the Coriant acquisition a success.   

“The low price reflects that this isn't the best asset on the market,” says Sterling Perrin, principal analyst, optical networking and transport at Heavy Reading. “They are buying $1 of revenue for 50 cents; the price reflects the challenges.”   

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Thursday
Jul262018

Imec eyes silicon photonics to solve chip I/O bottleneck

In the second and final article, the issue of adding optical input-output (I/O) to ICs is discussed with a focus on the work of the Imec nanoelectronics R&D centre that is using silicon photonics for optical I/O.

Part 2: Optical I/O

Imec has demonstrated a compact low-power silicon-photonics transceiver operating at 40 gigabits per second (Gbps). The silicon photonics transceiver design also uses 14nm FinFET CMOS technology to implement the accompanying driver and receiver electronics. 

Joris Van Campenhout“We wanted to develop an optical I/O technology that can interface to advanced CMOS technology,” says Joris Van Campenhout, director of the optical I/O R&D programme at Imec. “We want to directly stick our photonics device to that mainstream CMOS technology being used for advanced computing applications.”

Traditionally, the Belgium nanoelectronics R&D centre has focussed on scaling logic and memory but in 2010 it started an optical I/O research programme. “It was driven by the fact that we saw that electrical I/O doesn’t scale that well,” says Van Campenhout. Electrical interfaces have power, space and reach issues that get worse with each hike in transmission speed.

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Tuesday
Jul242018

Xilinx delivers 58G serdes and showcases a 112G test chip

In the first of two articles, electrical input-output developments are discussed, focussing on Xilinx’s serialiser-deserialiser (serdes) work for its programmable logic chips. In Part 2, the IMEC nanoelectronics R&D centre’s latest silicon photonics work to enable optical I/O for chips is detailed.

Part 1: Electrical I/O

Processor and memory chips continue to scale exponentially. The electrical input-output (I/O) used to move data on and off such chips scales less well. Electrical interfaces are now transitioning from 28 gigabit-per-second (Gbps) to 56Gbps and work is already advanced to double the rate again to 112Gbps. But the question as to when electrical interfaces will reach their practical limit continues to be debated. 

Gilles Garcia“Some two years ago, talking to the serdes community, they were seeing 100 gigabits as the first potential wall,” says Gilles Garcia, communications business lead at Xilinx. “In two years, a lot of work has happened and we can now demonstrate 112 gigabits [electrical interfaces].”

The challenge of moving to higher-speed serdes is that the reach shortens with each doubling of speed. The need to move greater amounts of data on- and off-chip also has power-consumption implications, especially with the extra circuitry needed when moving from non-return-to-zero signalling to the more complex 4-level pulse-amplitude modulation (PAM-4) scheme.  

PAM-4 is already used for 56-gigabit electrical I/O for such applications as 400 Gigabit Ethernet optical modules and by the leading edge 12.8-terabit capacity switch chips. Having 112-gigabit serdes at least ensures one further generation of switch chips and optical modules but what comes after that is still to be determined. Even if more can be squeezed out of copper, the trace lengths will shorten and optics will continue to get closer to the chip. 

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