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Infinera PICs 100Gbps coherent 

What is being announced?

Infinera is expediting its product plans, basing its optical transmission roadmap on coherent detection.

The company plans to launch a 100Gbps coherent transmission system in 2012. The design will be based on a pair of 5x100Gbps ultra-long-haul photonic integrated circuit (PIC) chips that will enable its systems to deliver 8 Terabits-per-second (Tbps) over a fibre.


“This change in roadmap is because of the successful development of our 100G coherent ASIC programme, and we have integrated five 100Gbps coherent channels onto one card.”

Drew Perkins, Infinera



Infinera also announced that it will be adding 40Gbps coherent detection to its DTN system in 2011. The 40Gbps will be based on optical modules and not its PIC technology. Using its planar technology and working with optical module suppliers to integrate its in-house coherent technology, Infinera’s DTN system will support 25GHz channel spacings to cram 160 lightpaths across the C-band, to deliver 6.4Tbps capacity.


Why is the announcement important?

Infinera had still to launch its 10x40Gbps PIC. This announcement marks a shift in Infinera’s strategy to focus on 100Gbps and gain a technology edge by offering the highest line speed at an unmatched density.

“It’s a good roadmap for Infinera,” says Jimmy Yu, a director at the Dell'Oro Group. “From an optical market perspective, I think 2012 is the right time for having a 100Gbps DWDM long-haul system.  And it'll definitely be coherent.”

Dell’Oro expects to see early adopters of 100Gbps in 2010 and 2011, but it will be 2012/2013 when the market for 100Gbps will ramp.  

What has motivated Infinera’s shift has been its success in developing coherent technology, says Drew Perkins, Infinera’s CTO. Coherent technology in combination with PICs is the best of all worlds, he says, marrying the two most significant optical developments of the last decade.

Perkins admits Infinera has been slow in offering 40Gbps technology.

“We are late to a very small market,” he says. “We think there is a 40G squeeze going on – it took the industry so long to get 40Gbps right with coherent technology such that 100Gbps is now just around the corner, as we are proving here.”

Yet Infinera will offer 40Gbps next year and will seek to differentiate itself with 25GHz channel spacing. “But it [the 40Gbps design] will be rapidly superseded by our 100Gbps, 8Tbps technology and then we believe we will be early to market with 100Gbps,” says Perkins.

Dell’Oro says 40Gbps is growing rapidly and it expects continued growing.  “In 2009, 40Gbps wavelength shipments grew a little over 160 percent, and we’re forecasting it to grow nearly 90 percent in 2010,” says Yu. “If Infinera delivers 40Gbps on 25GHz channel spacing, it'll be a good interim step to 100Gbps.”


What’s being done?

Infinera has now scrapped its 10x40Gbps differential quadrature phase-shift keying (DQPSK) PIC, going to a 5x100Gbps polarisation multiplexing quadrature phase-shift keying (PM-QPSK) design instead. Interestingly, Perkins says that the 10x40Gbps transmitter PIC was designed from the start to also support 5x100Gbps PM-QPSK modulation.

The challenge is designing the coherent receiver PIC which is significantly different, and has required Infinera to gain coherent expertise in-house. 

The receiver PIC also requires a local oscillator laser. “We have integrated the laser onto the receiver PIC per channel,” says Perkins.  Infinera’s PICs already use lasers that are tuned over a significant number of channels though not the whole C-band so this is using technology it already has.

Another key aspect of the coherent receiver is the associated electronics that comprises very high-speed A/D converters, a digital signal processor and most likely advanced forward error correction. Developing such an ASIC is a significant challenge.

Is Infinera developing such a design? Infinera points to its Ottawa, Ontario-based research facility that was announced in September last year. “That team is working on ASIC level coherent technology,” says Perkins. “This change in roadmap is because of the successful development of our 100G coherent ASIC programme, and we have integrated five 100Gbps coherent channels onto one card.”

Did Infinera consider designing a 10x100Gbps PIC? “It comes down to the size of the line card,” says Perkins. Infinera believes the resulting terabit line card would have been too large a jump for the industry given the status of associated electronics such as switching technology.


What next?

Infinera says that in 2012 it will ship systems based on its 100Gbps coherent PICs to customers but it is unwilling to detail the key development milestones involved between now and then.

As for future product developments, Infinera claims it can extend overall capacity of its coherent technology in several directions.

It says it can integrate 10, 100Gbps channels onto a PIC. “Somewhere in the future we undoubtedly will”, says Perkins. The company also states that in the “fullness of time” it could deliver 100Gbps over 25GHz channel spacings. 

Perkins also reconfirmed that Infinera will continue to advance the modulation scheme used, going from QPSK to include higher order quadrature amplitude modulation (QAM) schemes.   


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