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Entries in Al Yanes (3)

Thursday
Oct232025

PCI-SIG targets 256GT/s with the PCIe 8.0 bus protocol

Next-generation PCIe doubles lane speed again, but design challenges mount as AI reshapes interconnect needs.

The Peripheral Component Interconnect Special Interest Group (PCI-SIG), a 1,000-plus-member organisation that oversees the specification work of the long-established PCI Express (PCIe) bus used across industries, is progressing to specify the next version of the standard.

 

Source: PCI-SIG

Dubbed PCIe 8.0, the newest standard will double the bus's speed per lane to 256 giga-transfers per second (GT/s), twice the transfer rate of the PCIe 7.0 standard ratified in June. First PCIe 7.0-based products are expected next year.

In the data centre, PCIe is used by general-purpose processors in servers and AI accelerator clusters, connecting processors to storage and network interface cards (see chart above).

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Monday
Aug072023

The long arm of PCI Express  

Optical is being added as a second physical medium to the PCI Express (PCIe) data transfer protocol.

PCI Express is an electrical standard, but now the Peripheral Component Interconnect Special Interest Group (PCI-SIG) has created a working group to standardise PCIe’s delivery optically.

PCI-SIG is already developing copper cabling specifications for the PCI Express 5.0 and 6.0 standards.

 

Source: PCI-SIG

Since each generation of PCIe doubles the data transfer rate, PCI-SIG member companies want copper cabling to help with the design of high-speed PCIe interconnects on a printed circuit board (PCB), between PCBs, and between racks (see diagram).

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Wednesday
Jan192022

PCI-SIG releases the next PCI Express bus specification

The Peripheral Component Interconnect Express (PCIe) 6.0 specification doubles the data rate to deliver 64 giga-transfers-per-second (GT/s) per lane.

For a 16-lane configuration, the resulting bidirectional data transfer capacity is 256 gigabytes-per-second (GBps).

Al Yanes

“We’ve doubled the I/O bandwidth in two and a half years, and the average pace is now under three years,” says Al Yanes, President of the Peripheral Component Interconnect Special Interest Group (PCI-SIG).

The significance of the specification’s release is that PCI-SIG members can now plan their products.

Users of FPGA-based accelerators, for example, will know that in 12-18 months there will be motherboards running at such rates, says Yanes.

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