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Entries in Paul Voois (1)

Wednesday
Mar052014

ClariPhy samples a 200 Gigabit coherent DSP-ASIC 

ClariPhy Communications has entered the 100 Gigabit coherent merchant chip market after announcing first samples of its LightSpeed-II devices. 

The family of coherent digital signal processing ASICs (DSP-ASICs) is manufactured using a 28nm CMOS process. "We believe it is the first 28nm standard product, and leaps ahead of the current generation [DSP-ASIC] devices," says Paul Voois, co-founder and chief strategy officer at ClariPhy.

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